Tom Kelliher, CS 240
Feb. 10, 2012
Memory or registers.
|Intel Pentium 4||2000||42,000,000|
|AMD Athlon 64||2003||105,900,000|
|Intel Core 2 Duo||2006||291,000,000|
|Intel Core 2 Quad||2006||582,000,000|
|Intel Dual Core Itanium 2||2006||1,700,000,000|
|Six Core Xeon 7400||2008||1,900,000,000|
|Eight Core Xeon Nehalem-EX||2010||2,300,000,000|
|10 Core Xeon Westmere-EX||2011||2,600,000,000|
|Altera Stratix V||2011||3,800,000,000|
Once logic is collected into a block, it can be instantiated several times in several places.
Adders are used at several points within a CPU: integer ALU, program counter circuit, multiplier, etc.
Binary full adders are connected to form adders.
Consider the two-dimensional tiling of memory cells.
The ``old'' days: drafting tables, taping out a circuit, and lots of prototyping.
library ieee; use ieee.std_logic_1164.all; entity mux4_1 is port (a0: in bit; a1: in bit; d0: in bit; d1: in bit; d2: in bit; d3: in bit; z: out bit); end mux4_1; architecture behavioral of mux4_1 is signal address: bit_vector(1 downto 0); begin address <= a1 & a0; with address select z <= d0 when "00", d1 when "01", d2 when "10", d3 when "11"; end behavioral;
Combinational circuit analysis -- ``reverse engineering.'' Skip.
Can't re-wire a die.
Entire computers have been simulated to the point of booting the OS.
Results are only as good as the tests run.
Large circuits cannot be simulated completely. Just ask Intel
Good test vectors are the key to meaningful results.