Memory: ROM and RAM
Tom Kelliher, CS 240
May 3, 2010
Lab day Wednesday; I won't be around this weekend or Monday.
- ROM, FLASH.
- What is memory?
- Volatile vs. non-volatile.
- RAM characteristics: speed, density, power.
- Memory hierarchy: registers, cache, main memory, etc.
- General structure:
- Technologies: PROM, EPROM (UV), EEPROM, EAPROM, FLASH.
- Where do you find ROM in a PC?
- Structure of a ROM:
Minterms, fusible links.
- Usage: program storage, generation of combinational functions.
How do you use for combinational functions?
- A specific type of EEPROM.
- Erasure sets all the bits (to 1).
Programming/writing resets a bit (to 0).
- Two types:
- Cells connected in parallel to bit lines. Allows random
Similar to pull-down plane in a NOR gate, hence the name.
- Long erase and write times.
- Allows random access to any memory location.
``Drop-in'' replacement for ROM (system BIOS, other firmware).
- Sustains erase cycles.
- Cells connected in series to bit lines. Prohibits random
- Faster erase and write times. Denser.
- Block-oriented access. Suitable for secondary storage.
Block may consist of 64 pages of 2 KB each. Writes can be done on a
per page basis; erases on a per block basis.
- Sustains erase cycles.
- Programming NOR FLASH
- Cell resembles standard MOSFET, but there is a second, insulated
gate -- the ``floating gate,'' which is completely insulated by the
- To program, an elevated voltage is applied to gate and drain.
- Elevated voltage created by a charge pump.
- Source/drain current high enough to allow some high-energy
electrons to jump to the FG, charging it. This charge is essentially
- Charge on FG modifies the threshold voltage, essentially forcing
the transistor into an always open state (non-conducting), storing a
- Erasing NOR FLASH
- Apply large negative voltage from drain to gate.
- Electrons on FG are pulled to drain via quantum tunnelling.
- Threshold voltage restored, allowing transistor to once again
conduct, storing a 1.
- Cells are erased in blocks.
- Memory wear, bad block detection and management, wear levelling.
Remap blocks around bad spots, or to level erasure effects. (Per
block erasure counters needed).
Checksums used to detect and correct block failures.
- Additional inputs: !Enable, Read/!Write
- Static RAM: latches, inverter pair.
Used for caches. Fast. Not dense. High power.
- Dynamic RAM: stored charge on a capacitor.
- Leakage, refresh.
- Used for main memory. Slow. Dense. Low power.
- Sizes. I/O pin limitations. Solutions: one bit wide, address
multiplexing. 2-D structure.
- Additional inputs: RAS, CAS.
- Read/Write sequences.
Write strobe with respect to the clock signal. Importance of address bus
settling before write asserts.
Thomas P. Kelliher