Tom Kelliher, CS 240
Feb. 17, 2010
Memory or registers.
|Intel 4004||2.3 K||1971|
|Intel 8088||2.9 K||1979|
|Intel Pentium||3.1 M||1993|
|Xilinx Virtex||70 M||1997|
|Intel Pentium 4||42 M||2000|
|Xilinx Virtex-4||1 B||2004|
|Sony Cell||241 M||2006|
|Intel Core 2 Duo||291 M||2006|
|Intel 6-core Xeon 7400||1.9 B||2008|
|Altera Stratix IV||2.5 B||2008|
|AMD HD5800||2.154 B||2009|
|Intel 8-core Xeon Nehalem-EX||2.3 B||future|
|NVIDIA GF100||2.9 B||future|
Once logic is collected into a block, it can be instantiated several times in several places.
Adders are used at several points within a CPU: integer ALU, program counter incrementer, multiplier, etc.
Binary full adders are connected to form adders.
Consider the two-dimensional tiling of memory cells.
The ``old'' days: drafting tables, taping out a circuit, and lots of prototyping.
library ieee; use ieee.std_logic_1164.all; entity mux4_1 is port (a0: in bit; a1: in bit; d0: in bit; d1: in bit; d2: in bit; d3: in bit; z: out bit); end mux4_1; architecture behavioral of mux4_1 is signal address: bit_vector(1 downto 0); begin address <= a1 & a0; with address select z <= d0 when "00", d1 when "01", d2 when "10", d3 when "11"; end behavioral;
Combinational circuit analysis -- ``reverse engineering.'' Skip.
Can't re-wire a die.
Entire computers have been simulated to the point of booting the OS.
Results are only as good as the tests run.
Large circuits cannot be simulated completely. Just ask Intel
Good test vectors are the key to meaningful results.