Final Review

Tom Kelliher, CS 240

May 1, 2000

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Assignment

From Last Time

Buses.

Outline

  1. Buses.

  2. Final review.

Coming Up

Final Review

Final is cumulative. Refer to last review for material on pipelining, IA-64, superscalar, etc.

  1. Layers of the memory hierarchy.

  2. Characteristics of the memory hierarchy: speed, size, cost.

  3. Principle of good memory system design: access time of highest layers, size of lowest layers.

  4. Locality: spatial, temporal.

  5. Caches:
    1. Associativity.

    2. Block sizes.

    3. Address partitioning

    4. Replacement schemes.

    5. Tag field, valid bit.

    6. Performance: CPU time, memory-stall, speedup equations.

  6. Memory system design: one-word wide, wide, interleaved organizations

  7. Virtual memory:
    1. Mapping from virtual space to physical space.

    2. MMU.

    3. Page tables: design issues.

    4. Protection.

    5. TLBs.

    6. Sharing.

    7. Idea behind VM: demand paging.

    8. System support: Kernel, MMU, CPU.

    9. Replacement policies: FIFO (Belady), optimal, LRU. Implementation issues. Clock algorithm.

    10. Thrashing.

    11. Placement policies: static, dynamic. Working set, page fault frequency. Implementation.

  8. I/O
    1. Types.

    2. Software system examples.

    3. Buses: What they do, terminology, types.

    4. PCI bus.



Thomas P. Kelliher
Mon May 1 10:14:29 EDT 2000
Tom Kelliher