Final Review
Tom Kelliher, CS 240
May 1, 2000
Buses.
- Buses.
- Final review.
Final is cumulative. Refer to last review for material on pipelining,
IA-64, superscalar, etc.
- Layers of the memory hierarchy.
- Characteristics of the memory hierarchy: speed, size, cost.
- Principle of good memory system design: access time of highest layers,
size of lowest layers.
- Locality: spatial, temporal.
- Caches:
- Associativity.
- Block sizes.
- Address partitioning
- Replacement schemes.
- Tag field, valid bit.
- Performance: CPU time, memory-stall, speedup equations.
- Memory system design: one-word wide, wide, interleaved organizations
- Virtual memory:
- Mapping from virtual space to physical space.
- MMU.
- Page tables: design issues.
- Protection.
- TLBs.
- Sharing.
- Idea behind VM: demand paging.
- System support: Kernel, MMU, CPU.
- Replacement policies: FIFO (Belady), optimal, LRU.
Implementation issues. Clock algorithm.
- Thrashing.
- Placement policies: static, dynamic. Working set, page fault
frequency. Implementation.
- I/O
- Types.
- Software system examples.
- Buses: What they do, terminology, types.
- PCI bus.
Thomas P. Kelliher
Mon May 1 10:14:29 EDT 2000
Tom Kelliher