Using Xilinx Foundation Tools

Tom Kelliher, CS 220

Fall, 2001

This document will take you through some of the basic steps involved in using the Xilinx Foundation Tools:

• Creating a new HDL project

• Running the VHDL editor

• Adding a library to a project (not always necessary)

• Synthesizing an HDL design

• Simulating a design

• Printing simulation results

• Saving and restoring waveform and simulator settings

• Clearing the simulation waveforms

Creating a New HDL Project

1. If you just started Project Manager, you'll be presented with a dialog box. Select the option to create a new project. Otherwise, select New Project from the File menu.

2. Fill-in the requested information. ``Directory'' should be your Xilinx directory on your G: drive. ``Name'' should be a descriptive project name. Select HDL Flow for the project ``Flow.''

Running the VHDL Editor

1. Once you've opened your project, you can double-click any .vhd file in the Files tab window to open it in the editor.

2. To create a new VHDL file and edit it, click the HDL icon in the Flow tab window. You can use the wizard to describe the port information for your entity (this saves you some typing) or just create an empty file and take it from there.

3. To check your program's syntax, use the check syntax button (the button's icon is a down-arrow and question mark above a document sheet).

4. Save your program before moving back to the Project Manager window.

5. Surprisingly, just-created VHDL files aren't automatically made a part of the project. To add your file to your project, open the Project menu in Project Manager and choose Add Source Files. Add the .vhd file you just created.

Adding a Library to a Project

You won't need to do this very often. One situation where you would have to do this is if you use the LCDF_VHDL library with structural VHDL.

1. From Project Manager, open the Synthesis menu and choose New Library.

2. Enter the name of your library. For example: LCDF_VHDL.

3. An icon representing your program will appear in the Files tab window. Right-click on it and choose Add Source Files from the pop-up menu.

4. Add the appropriate .vhd library files.

Synthesizing an HDL Design

Each time you change your source VHDL, you need to re-synthesize before running simulation. (Synthesizing a design is similar to compiling a program.)

1. Clear up any syntax check errors first.

2. In the Flow tab window, click the Synthesis button.

   Note: When you have multiple .vhd files in a project (for instance, you're using the LCDF_VHDL library) you will have to select the top-level entity. This will never be a library entity. To begin synthesis in this situation follow these instructions: To select the top-level entity, expand your top-level VHDL file in the Files tab window, right-click on the top-level entity, and choose Set As Top-Level from the pop-up menu. This will start the synthesis process.

3. Within the dialog box that opens, set ``Family'' to XC4000XL, ``Device'' to 4010XLPC84, and ``Speed'' to XL-3.

   If you have already synthesized your project, these choices should be pre-selected for you.

4. Run the synthesis.

Simulating a Design

Here's where you test your design to determine if it behaves as intended. Just as proper selection of test cases is critical in debugging a program, proper selection of test vectors is critical in debugging a hardware design.

1. First, if you've made any VHDL changes, re-synthesize your design.

2. In the Flow tab window, click Simulation. The Logic Simulator tool will run.

3. First, you need to select waveforms to view. From the Logic Simulator's Signal menu choose Add Signals.

4. Add all your I/O signals. Select Close when you're finished.

5. Now, you need to specify ``stimulators'' for your input signals. Stimulators provide input values to the input signals. From the Signal menu choose Add Stimulators.

6. If you're working with buses (vectors), there is a Buses button on the waveform window that you can use to toggle the buses between their individual bits and the actual buses. You'll need to see the individual bits to assign stimulators, but probably want to view the buses while debugging.

7. In the waveform window click on and select an input signal. In the Stimulator Selection window select a keyboard key stimulator.

   Repeat for each of your input signals, selecting a different key for each signal.

   Close the stimulator selection window.

8. To initialize or re-start a simulator, click the On button. Use your keyboard stimulators to set you inputs to 0 or 1, as appropriate.

9. Click the simulator step button and observe your circuit's output. Use your keyboard stimulators to adjust your inputs and repeat.

Printing Simulation Results

1. Click the print button.

2. A dialog box opens. You can click the Printer button to choose a particular printer (hoff123ps in the X lab) and set the orientation to landscape (generally preferred for waveforms). Be careful to adjust time per page to a value that fits the waveform onto one, or at most two, pages!!! The units available are ns (nanoseconds) us (microseconds) and ms (milliseconds).

3. Click the Print button.

Saving and Restoring Waveform and Stimulator Settings

This is useful so that you don't have to re-enter your signal and stimulator selections each time you start a simulation run.

1. To save the settings, from the File menu choose Save Waveform.

2. To restore the setting, from the File menu choose Load Waveform.

   Once you've loaded the saved waveform, you'll probably want to clear the waveforms to start a new simulation. See the next section.

Clearing the Simulation Waveforms

You'll do this to remove the current simulation waveforms so you can start a new simulation.

1. From the From the Waveform menu, select Delete and then choose All Waveforms with Power On. You're now ready to start a simulation.