Tom Kelliher, CS26
Sept. 5, 1996
On-line CPU resources
For a single program, here's the fundamental equation:
where T is execution time, N is the number of machine instructions to be executed, S is the average number of clock cycles per machine instruction, and R is the clock frequency.
What can we do to improve T?
Little-endian byte numbering:
Big-endian byte numbering:
Consider the MIPS instruction
add $16, $17, $18 # R16 = R17 + R18Here's how the instruction is stored in memory:
Instruction set design choices:
Registers --- the programmer's ``manual cache.''
Consider the C code:
a = b + c;Three address:
add a, b, c load a, r0 load b, r1 add r0, r1, r1 store r1, cTwo address:
move a, c add b, cOne address (implied operand --- accumulator):
load a add b store cZero address (stack machine):
push a push b add pop c
Simple instruction cycle:
How do you structure a program to add n numbers?
Pseudo C code:
i = n; sum = 0; while (i > 0) sum += number to be added;
move n, r1 clear r0 loop: add next number, r0 decrement r1 branch >0, loop move r0, sumn, sum are memory locations.
How does this fit in memory and get executed?
Effects on performance?
Effective address (EA): final location of the operand.
EA is a register, specified in instruction.
add r0, r1
EA is a memory location, address specified in instruction.
add data, sum add 16, 24
EA is the instruction --- operand is part of the instruction.
move #0, r0 sub #1, r1
EA is memory location pointed to by register or memory word indicated in instruction.
add (r1), r0
EA is memory location pointed to by sum of register and a constant (both specified in instruction).
add 12(r0), r1Sometimes called base, displacement (offset) addressing.
Not really used for what you think.
Stack operations: post-increment, pre-decrement.