Instruction Set Design II

Tom Kelliher, CS 240

Jan. 25, 1999

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Assignment

From Last Time

Instruction set design considerations, classes, arithmetic instructions.

Outline

1. Register, memory, and immediate operands.

2. Instruction formats.

Next Time

Decision making, other addressing modes.

Instruction Set Design

Instruction Operands

Consider operands within an HLL:

#include <stdio.h>

int main()
{
   int foo = 1234;

   printf("%d,   %p\n", foo, &foo);

   return 0;
}

RISC instruction sets don't ordinarily support memory operands. Why not?

Where are the operands? Registers.

Properties of registers:

1. Number of registers. 32 for MIPS, including the hardwired register. Two ways of naming: numbers, convention ``nicknames''. Why not more? Size of register file, size of operand fields within instructions.

   Other register files: x86, SPARC and the register window (Berkeley RISC, about 128 registers, spilling).

   Register renaming: ISA registers vs. physical registers.

2. Number of bits/register. 32. Word size.

   Implications: size of address space, datapath width.

3. General purpose vs. special purpose.

   MIPS, M68000, x86.

Using MIPS Registers

See pg. A-23 for the full register naming convention. Note the limited number of s and t registers.

Our simple convention:

1. Use $s0, $s1, etc. for C variables.

2. Use $t0, $t1, etc. for temps.

Recall:

f = (g + h) - (i + j);

Memory Addressing

HLL have complex data structures such as arrays and structs. How are they handled?

Data transfer instructions: load, store. operands: memory address, register.

Actual MIPS instructions: lw, sw.

MIPS memory is byte addressable, so word addresses differ by 4:

Endianess.

Compile the following:

g = h + A[8];

Base, offset addressing.

Compile each of the following:

A[12] = h + A[8];

A[j] = h + A[i];

Notes:

1. Base, offset addressing, using constant offsets, is similarly useful for accessing members of structures.

2. Variables in registers are simpler to use and faster than variables in memory. Compilers must be clever in optimizing register use. Spilling registers.

Instructions at the Machine Level

(Section 3.4)

1. What does a real instruction look like?

2. Consider an add instruction. What has to be there? What about a memory access instruction?

3. Bits per instruction? Variably-sized instructions? Variable field positions?

4. Design principle 3: Good design demands good compromises. One instruction width, different formats. Overlap (maintain regularity) where possible.

Instruction formats for instructions we've seen so far:

Field meanings?

Immediate Operands

1. Operand types (addressing modes) we've seen so far: registers, memory.

2. What about constants? Where have we already seen immediates?

3. Immediate operand: found within the instruction itself.

4. Small immediates occur frequently, so...

5. Design principle 4: Make the common case fast.

6. But, how do I load a 32-bit immediate? lui followed by addi (whoops, sign extension) or ori.

7. How does the assembler manufacture 32-bit immediates for us? Register $at.

8. Programmer conventions. ``Enhanced'' assembly language. Simplicity.