Building a Carry Lookahead Adder; Constant Time Addition
Tom Kelliher, CS 240
Feb. 22, 1999
Read Sections B.4--B.7. Homework handout.
MIPS ALU, introduction to fast adders.
- Components of a carry lookahead adder.
- Redundant representations and constant time addition.
Sequential logic, datapath design
The big picture. Restricting the carry computation circuitry to a tree
structure:
What does this buy us?
- Design a 4-bit full carry lookahead adder.
Block diagram:
Block generate, propagate.
- What is the fan-in?
- What is the delay model from inputs to outputs?
- Design a 4-Group carry lookahead unit.
Block diagram:
Use of block generates, propagates.
- What is the fan-in?
- What is the delay model from inputs to outputs?
Cascaded and full carry lookahead.
Cascaded and full carry lookahead.
Start with the standard base four digit set:
Not binary!
Throw in some ``additional'' digits:
Where:
An MRR4 number:
How do we represent the digits?
-
Sign of the leading digit is the sign of the number.
-
Conversion from non-redundant form to redundant form is trivial.
-
There are an infinite number of ways of representing a single value:
Therefore, comparing two numbers is difficult.
-
Converting from redundant to non-redundant is (relatively) hard.
One digit full adder:
Organized like this:
where:
For this to work, we must have:
Can we actually accomplish this?
Addition Table:
-
The carry chain is broken.
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Carries propagate at most one digit position.
-
This yields a constant time adder.
What about Winograd's bound?
-
Ordinary addition is
.
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MRR4 addition is O
.
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MRR4 skirts Winograd's bound by rejecting the dependency observation.
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MRR4 is quite applicable within the domain of Application Specific Systems.
Thomas P. Kelliher
Sat Feb 20 15:26:03 EST 1999
Tom Kelliher