MIPS ALU, Carry Lookahead Addition

Tom Kelliher, CS 240

Feb. 19, 1999

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Assignment

From Last Time

Building an ALU.

Outline

1. MIPS ALU.

2. Carry lookahead addition.

Coming Up

Constant time addition with alternative number systems.

A MIPS ALU

What additional functionality needed?

1. Subtraction.

2. slt instruction.

3. beq/ bne comparison.

4. Overflow detection.

Subtraction

1. Complementing the b input: additional control signal.

2. Adding the 1.

slt

1. result = (a - b) < 0

2. Additional mux input to one bit ALU.

3. Need adder output from msb; wraparound to lsb position.

Branch Comparisons

Need signal to indicate that result equals 0.

Overflow Detection

Inputs: operation, signs of a, b, result.

Why carry-out in Figure 4.17?

Control Summary

Three input lines:

1. Subtract b.

2. Mux select: two lines.

3. Eight possibilities, five used: and, or, add, subtract, set on less than.

Carry Lookahead Addition

1. Why bother with speeding up addition?

2. Divide and conquer approach to addition: , where .

3. Can we pre-compute the carries?

4. Carry generate: .

5. Carry propagate: .

6. Illustration: look at p, g, and c for 11010101 and 01110011.

7. Some carry equations:
   1. 

   2. 

   3. 

8. A bit of recursion:
   1. Base case:

   2. Recursive step:

9. Why this isn't feasible. The Winograd lower bound.

4-Bit Carry Lookahead Adder

The big picture. Restricting the carry computation circuitry to a tree structure:

What does this buy us?

1. Design a 4-bit full carry lookahead adder.

   Block diagram:

   

   Block generate, propagate.

2. What is the fan-in?

3. What is the delay model from inputs to outputs?

4-Group Carry Lookahead Unit

1. Design a 4-Group carry lookahead unit.

   Block diagram:

   

   Use of block generates, propagates.

2. What is the fan-in?

3. What is the delay model from inputs to outputs?

16-Bit Carry Lookahead Adders

Cascaded and full carry lookahead.

32-Bit Carry Lookahead Adders

Cascaded and full carry lookahead.