Other Instruction Sets, Number Representation

Tom Kelliher, CS 240

Feb. 5, 1999

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Assignment

Read Sections 4.4, 4.5.

From Last Time

Summary of addressing modes, loop optimization, background of 80x86 architecture.

Outline

1. 80x86, PowerPC architectures.

2. Number representation.

Coming Up

More number representation, addition/subtraction, logical operations, ALU design.

Other Instruction Sets

80x86: A CISC

Basics:

1. 32-bit data and address.

2. Two-address architecture.

3. Operand combinations: register/register, register/immediate, register/memory, memory/register, memory/immediate.

4. 8 32-bit ``general purpose'' registers.

5. Several 16-bit registers: code and stack segment pointers, several data segment pointer.

6. Condition codes register. Conditions codes set as a side-effect of ALU instructions.

   Advantage: moves the compare from the branch to the ALU instruction.

   Disadvantage: superscalar, OOE.

7. Variably-sized instructions: 1 to 17 bytes. Example prefix bytes:
   1. Override default segment register.

   2. Lock the memory bus.

   3. repeat instruction until ECX clears.

Addressing modes:

1. Some instructions use postbytes to specify addressing modes.

New addressing modes:

1. Register indirect.

   Direct MIPS synthesis.

2. Base with 8- or 32-bit offset.

3. Base with scaled index

4. Base with scaled index and 8- or 32-bit offset.

PowerPC: Another RISC

Basics similar to MIPS:

1. 32 registers.

2. 32-bit instructions.

3. Load-Store architecture.

Additional features:

1. Indexed addressing: address is sum of two registers.

   General applicability?

2. Update addressing: similar to base/offset addressing with the additional wrinkle of automatically incrementing the base register by sizeof(operandType) after access.

   Other strides? ALU conflicts?

3. Load/store multiple: load/store upto 32 registers in a single instruction. Useful for: register save/restore, block memory copying.

   Complexity? Can it be done with hardwired control?

4. A special loop control register, distinct from the 32 registers and accessed by a special conditional branch instruction which decrements it and then tests it ( =0, !=0).

   Useful for:

   for (i = n; i != 0; --i)
      /* code block */;
   

   Not generally useful. What it can lead to.

Number Representation

1. Weighted, positional number systems:
   1. Digit weights.

   2. Digit positions within a number.

2. Conventionally, a base x system uses x numerals (symbols).

   Consider decimal. This really isn't the case. Why? How can we make it so.

3. Consider a four bit binary number: . What does contribute to the value of the number?

4. Hexadecimal: For the sake of brevity, binary numbers are often written in hexadecimal form, because of a direct conversion between the two:

   

   Examples: convert 110101 to hex and AE to binary.

5. MIPS registers are 32-bits. How do you store 4 in a register?

   What is the range of unsigned values representable in the MIPS? In general, with i-bits, how many unsigned values can we represent?

6. What do we do about numbers that are too big? Fractions? The reals?

7. What about negative values? How do we represent them?

   How do we solve this in the decimal system.

   The sign bit. Location within a word.

8. Problems with sign-magnitude representation:
   1. Multiple zero representations.

   2. Consider the algorithm for a + b:

      if a and b are of the same sign
      {
         sign of sum = sign of a;
         magnitude of sum = magnitude of a + magnitude of b;
      }
      else if magnitude of a > magnitude of b
      {
         sign of sum = sign of a;
         magnitude of sum = magnitude of a - magnitude of b;
      }
      else
      {
         sign of sum = sign of b;
         magnitude of sum = magnitude of b - magnitude of a;
      }
      

   What a mess? Are we stuck with it?