instructions (not bytes) forward or 
instructions backwards. The jump instruction contains a 26 bit
address field (the third instruction format).
Tom Kelliher, CS 240
Feb. 1, 1999
Why is there no subi?
Homework due Friday.
From last time: Read Sections 3.7, 3.9, 3.12--15. Summary of assigned reading from Chapter 3: everything but 3.6, 3.10--11.
Memory access, instruction formats.
Summary of addressing modes, survey of other instruction sets, perspectives.
The complete set, all synthesized from beq, bne, and slt*.
Branch instructions use a signed 16-bit offset field; hence they can jump
instructions (not bytes) forward or
instructions backwards. The jump instruction contains a 26 bit
address field (the third instruction format).
Synthesize blt $s0, 8, L.
According to inside back cover bne is immediate format. Why can't we
use bne $s0, 8, L as is?
b label instruction
Unconditionally branch to the instruction at the label.
slt Rdest, Rsrc1, Src2 Less Than
slti Rdest, Rsrc1, Imm Less Than Immediate
sltu Rdest, Rsrc1, Src2 Less Than Unsigned
sltiu Rdest, Rsrc1, Imm Less Than Unsigned Immediate
Set register Rdest to 1 if register Rsrc1 is less than
Src2 (or Imm) and to 0 otherwise.
beq Rsrc1, Src2, label on Equal
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 equals Src2.
beqz Rsrc, label on Equal Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc equals 0.
bge Rsrc1, Src2, label on Greater Than Equal
bgeu Rsrc1, Src2, label on GTE Unsigned
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 are greater than or equal to Src2.
bgez Rsrc, label on Greater Than Equal Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc are greater than or equal to 0.
bgt Rsrc1, Src2, label on Greater Than
bgtu Rsrc1, Src2, label on Greater Than Unsigned
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 are greater than Src2.
bgtz Rsrc, label on Greater Than Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc are greater than 0.
ble Rsrc1, Src2, label on Less Than Equal
bleu Rsrc1, Src2, label on LTE Unsigned
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 are less than or equal to Src2.
blez Rsrc, label on Less Than Equal Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc are less than or equal to 0.
blt Rsrc1, Src2, label on Less Than
bltu Rsrc1, Src2, label on Less Than Unsigned
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 are less than Src2.
bltz Rsrc, label on Less Than Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc are less than 0.
bne Rsrc1, Src2, label on Not Equal
Conditionally branch to the instruction at the label if the contents
of register Rsrc1 are not equal to Src2.
bnez Rsrc, label on Not Equal Zero
Conditionally branch to the instruction at the label if the contents
of Rsrc are not equal to 0.
j label
Unconditionally jump to the instruction at the label.
jal label and Link
jalr Rsrc and Link Register
Unconditionally jump to the instruction at the label or whose address
is in register Rsrc. Save the address of the next
instruction in register 31.
jr Rsrc Register
Unconditionally jump to the instruction whose address is in register
Rsrc.
Write MIPS code fragments corresponding to the following:
if (i < 12) ++i; else --j;
while (i > 0 && i < 200)
{
i = j;
i *= i;
}
Hint: mul instruction.
if (i < 12 && j > 3 || k != 0) ++i; else if (i == 33) --j; else k += 2;
for (i = 1; i <= 32 ; i *= 2) cout << i << endl;(Details: print int --- 1 in
$v0, value in $a0; print string
--- 4 in $v0, pointer to string in $a0.)
Problems from the text.
