Midterm 2 Review

Tom Kelliher, CS 240

Apr. 12, 1999

Administrivia


Review

  1. Instruction formats and fields. Placement, usage.

  2. Instruction cycle. Machine/clock cycle.

  3. The abstract datapath.

  4. The instructions under consideration: 5 R-format, lw/sw, beq.

    Instruction mixes and weighted averages.

    Adding instructions.

  5. Datapath components: registers, register file, ALU, memory, misc.

    Functional units. I.e., fetch unit, branch unit. Reconciling.

  6. Fitting the clock cycle to the datapath.

  7. Datapath control signals.

  8. Comparison of the two implementations.

  9. The abstract datapath for the multicycle implementation.

    Rationales for the additional registers.

  10. The multicycle datapath.

    Control signals.

  11. Multicycle implementation state machine.

    High level view.

    Derived directly from operations. Example: lw. States merged when advantageous.



Thomas P. Kelliher
Mon Apr 12 08:15:34 EDT 1999
Tom Kelliher