Operand Counts and Addressing Modes

Tom Kelliher, CS 220

Nov. 17, 1997

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Assignment

Read Chapter 9.

Number of Operands

Consider the C code:

a = b + c;
Three address:
add a, b, c      # SAL

lw $8, b($0)     # MAL  Inefficient.
lw $9, c($0)
add $8, $8, $9
sw $8, a($0)
Two address:
move a, b
add a, c
One address (implied operand --- accumulator):
load a
add b
store c
Zero address (stack machine):
push a
push b
add
pop c

What are the advantages/disadvantages? Consider the C code:

ave = (a + b + c + d) / 4;
How many instructions are required for each number of operands?

Sizes of instructions?

Addressing Modes

Effective address: location of the operand.

Possible operand locations:

  1. Immediate mode: operand is in the instruction.

    This mode is used for constants.

  2. Direct mode: the memory address of the operand is in the instruction.

    This is the model we associate with SAL.

  3. Register mode: operand is stored in a register whose ID is in the instruction.

    Similar to direct mode, but faster and a far smaller ``memory.''

  4. Register direct mode: the memory address of the operand is stored in a register whose ID is in the instruction.

    The register is a pointer.

  5. Base Displacement: the memory address of the operand is the sum of a base address (stored in a register whose ID is in the instruction) and an immediate displacement (stored in the instruction)

    Displacements are signed.

    Array, struct access. Not so much array.

    Branch instructions use PC-relative addressing, which is similar to Base displacement:

    1. PC is base.

    2. Displacement is stored as a signed immediate in the instruction.

    3. When branch taken, computed address is stored into PC.

The MIPS combines three of these into one! Can you tell which three?



Thomas P. Kelliher
Fri Nov 14 21:21:38 EST 1997
Tom Kelliher