Homework 5

CS 220

40 points, due Nov. 14, 1997

1. Design CMOS transistor networks to compute the functions
   1. 

   2. 
   First, design a network consisting of inverters and two-input nand and nor gates for each function. Second, design a network consisting of a single pull-up and a single pull-down for each function. For each function, compare the two implementations. Which do you think would be faster? Why?

2. Using two CMOS gates, one of which is an inverter, implement the carry output for a binary full adder. Here is the boolean equation:

   

3. Using Problem 1 as a hint, design a CMOS exclusive-nor gate, using only two gates:

   

4. Consider the following circuit and input waveform:

   

   The waveform is applied to the inputs of the circuit, with time represented on the horizontal axis. The vertical axis represents the logical values 0 and 1, as indicated. Copy the waveforms to another sheet, and complete Q's waveform.