Final Exam Review

Tom Kelliher, CS 240

May 5, 2004

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``Homework'' due Friday.

Assignment

From Last Time

Virtual memory.

Outline

1. Review for final.

Coming Up

Final.

Review for Final

• Chapters covered: 2--7.

• Refer to previous reviews for earlier material.

• Slight bias toward more recent material, but coverage will be fairly even.

• Final exam format:
  • 8 short answer questions. Each 15 points.

  • Two ``essay'' questions. Each 40 points.

1. Pipelining:
   1. Changes to datapath, control

   2. Hazards: structural, data, control. Penalties, solutions.

2. Superscalar execution:
   1. IPC

   2. Widening the entire datapath.

   3. Applicability.

   4. Types of data dependencies. True, false dependencies. Removal of false dependencies: register renaming.

   5. Out-of-order execution, in-order completion.

3. Caches:
   1. The memory hierarchy.

   2. Exploiting program locality properties. Advantages of using caches.

   3. Cache types: direct mapped, set-associative, fully-associative.

   4. Address partitioning: tag, offsets.

   5. Ideas behind direct-mapped caches. Analysis of direct mapped caches.

4. Virtual memory:
   1. Mapping between virtual address space and physical address space (memory and paging device).

   2. Locality, advantages.

   3. Requirements:
      1. Kernel support: page fault handler, page placement and page replacement policies.

      2. MMU support: valid/invalid bit, reference bit, dirty bit, read/write bit.

         Exceptions generated: memory fault (unmapped page), page fault (page not in memory), write on read-only fault.

      3. CPU support: Instructions must be re-startable.

   4. Page fault sequence (memorize all 147 steps).

   5. Demand paging performance: effective access time.

5. Important earlier material:
   1. Performance comparisons.

   2. Carry lookahead adders.

   3. MIPS programming.

   4. Function unit design.

   5. Single- and multi-cycle implementations.