Instruction Set Design II

Tom Kelliher, CS 240

Feb. 1, 2002

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Assignment

Read 3.5, A.1--5, A.9.

From Last Time

Instruction Set Design I.

Outline

1. Instruction operands: registers.

2. Accessing memory.

3. Instruction formats.

Coming Up

Conditional instructions, SPIM.

Instruction Set Design

Instruction Operands

(Continued.)

Properties of registers:

1. Number of registers. 32 for MIPS, including the hardwired register. Two ways of naming: numbers, convention ``nicknames''. Why not more? Size of register file, size of operand fields within instructions.

   Other register files: x86, SPARC and the register window (Berkeley RISC, about 128 registers, spilling).

   Register renaming: ISA registers vs. physical registers.

2. Number of bits/register. 32. Word size.

   Implications: size of address space, datapath width.

3. General purpose vs. special purpose.

   MIPS, M68000, x86.

Using MIPS Registers

See pg. A-23 for the full register naming convention. Note the limited number of s and t registers.

Our simple convention:

1. Use $s0, $s1, etc. for C variables.

2. Use $t0, $t1, etc. for temps.

Recall:

f = (g + h) - (i + j);

Memory Addressing

1. HLL have complex data structures such as arrays and structs. How are they handled?

2. Data transfer instructions: load, store. operands: memory address, register.

3. Actual MIPS instructions: lw, sw.

   Base and offset addressing: lw $s0, 8($s1)

4. MIPS memory is byte addressable, so word addresses differ by 4:

   

5. Endianess:
   1. Big endian machines: HP PA-RISC, IBM Power, MIPS, SPARC.

   2. Little Endian: x86.

   3. MIPS can go either way!

Compile the following:

g = h + A[8];

Base, offset addressing.

Compile each of the following:

A[12] = h + A[8];

A[j] = h + A[i];

Notes:

1. Base, offset addressing, using constant offsets, is similarly useful for accessing members of structures.

2. Variables in registers are simpler to use and faster than variables in memory. Compilers must be clever in optimizing register use. Spilling registers.

Instruction Formats

How do we encode instructions for storage in memory? Issues:

1. Compactness --- smaller programs use less memory bus bandwidth and less memory space.

2. Decoding ease --- simplify the instruction decoder.

3. Length --- fixed or variable.

4. Size --- one or multiple words.

MIPS R-Format

Example instruction: add $s2, $s0, $s1

Fields:

1. Op: Opcode.

2. Rs: First source operand.

3. Rt: Second source operand.

4. Rd: Destination operand.

5. Shamt: Shift amount --- ignore for now.

6. Func: Function. Further specification of the opcode.

Notes:

1. Memorize field positions and sizes for all three formats. Necessary later.

2. Example encodings:

   

MIPS I-Format

1. How do we fit Memory instructions into r-format? We can't!

2. Design principle 3: Good design demands good compromises.

3. Introduce another format --- added complexity tradeoff.

Example instruction: lw $s0 8($s1)

Fields:

1. Op: Opcode.

2. Rs: Source register.

3. Rt: Destination register.

4. Address: 16-bit signed immediate value.

   Offset range?

Notes:

1. This format also used for immediate operands: addi $1, $2, 123.

2. Example encodings: