Tom Kelliher, CS 240
Feb. 14, 2000
Read papers.
Exceptions.
More superscalar execution and other advanced pipelining techniques.
Challenges: small register files, multiple-branch predictions, multiple line fetches from caches.
Text processing: low, mostly.
Image processing, multimedia: high.
Median operation on an image example:
medianImage(image dest, image src)
{
for each pixel, p, in src
p in dest = medianPixel(p in src);
}
medianPixel(pixel p)
{
find the <= 8 neighboring pixels of p;
compute and return the median value;
}
Challenges: exposing potential ILP to the compiler.
Example. Parallelize the following:
sum = 0; for (i = 0; i < last; ++i) sum += array[i];
r1 = r2 + r3
r4 = r1 + r5
r1 = r6 + r7
r8 = r1 + r4
ISA registers vs. physical registers. Register renaming?
Rename the previous example where the Register Alias Table (RAT) is initially:
r1 -> p12 r2 -> p6 r3 -> p9 r4 -> p15 r5 -> p1 r6 -> p10 r7 -> p8 r8 -> p14 Free List: p5, p11, p13, p4.Which dependencies were removed? Which remain?
Structural hazard stalls.
Only stall if no free list entries.