Introduction to Superscalar Execution

Tom Kelliher, CS 240

Feb. 14, 2000

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Outline

  1. Introduction to superscalar pipelining

  2. Data dependencies.

  3. Out of order execution.

  4. Multiple Instruction Issue

Coming Up

More superscalar execution and other advanced pipelining techniques.

Introduction to Superscalar Pipelining

  1. Historical Progression of IPC: < 1, = 1, > 1. The entire pipeline must be widened.

    Challenges: small register files, multiple-branch predictions, multiple line fetches from caches.

  2. Range of parallelism: coarse- to fine-grained.

  3. Superscalar techniques address ILP. Let's parallelize a sequential binary.

  4. What's the upper bound on IPC? It depends.

    Text processing: low, mostly.

    Image processing, multimedia: high.

    Median operation on an image example:

    medianImage(image dest, image src)
    {
       for each pixel, p, in src
          p in dest = medianPixel(p in src);
    }
    
    medianPixel(pixel p)
    {
       find the <= 8 neighboring pixels of p;
       compute and return the median value;
    }
    
    Challenges: exposing potential ILP to the compiler.

    Example. Parallelize the following:

    sum = 0;
    
    for (i = 0; i < last; ++i)
       sum += array[i];
    

  5. Compiler techniques: loop unrolling, invariant code migration, strength reduction, etc.

Types of Data Dependencies

  1. RAR. Not a problem at all.

  2. RAW. A ``true'' dependency.

  3. WAR. A ``false'' dependency.

  4. WAW. Another ``false'' dependency.

Consider the code segment:
      r1 = r2 + r3
      r4 = r1 + r5
      r1 = r6 + r7
      r8 = r1 + r4
ISA registers vs. physical registers. Register renaming?

Rename the previous example where the Register Alias Table (RAT) is initially:

r1  -> p12     r2  ->  p6     r3  ->  p9     r4  -> p15
r5  -> p1      r6  -> p10     r7  ->  p8     r8  -> p14

Free List: p5, p11, p13, p4.
Which dependencies were removed? Which remain?

Out of Order execution

  1. What is it?

  2. In-order completion.

  3. How is it done?

Multiple Instruction Issue

  1. In-order execution case.

    Structural hazard stalls.

  2. Out of order execution case.

    Only stall if no free list entries.



Thomas P. Kelliher
Mon Feb 14 10:01:01 EST 2000
Tom Kelliher