Paging, Virtual Memory

Tom Kelliher, CS 240

Apr. 14, 2000

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Virtual addresses, paging.

Outline

  1. Virtual memory, paging.

Coming Up

Virtual memory.

Paging

Paging hardware:

Design issues:

  1. Page size:
    1. Internal fragmentation.

    2. Maximizing I/O transfer rate.

  2. I/O --- process passes logical address to kernel.

  3. Implementation of the page table.
    1. Small register file.

    2. Array in memory.

  4. Issues for memory implementation:
    1. Page table must be in contiguous memory.

    2. Page table base register.

    3. ``Logical memory access'' requires two physical accesses.
      1. Translation look-aside buffer.

      2. TLB entries contain: Page number, frame number pairs.

      3. Issue: Context switches.

      4. Only a few entries needed.

Size, Structure of Page Table

  1. Problem: huge page tables. How did this happen?

  2. Solutions:
    1. Valid/invalid bit.

    2. Page table limit register.

    3. Multi-level paging.

Protection

  1. Is it possible for a process to access an arbitrary memory location?

  2. Using valid bit to introduce ``holes'' into logical address space.

Page Sharing

  1. What can be shared?

  2. Read-only pages.

  3. Page alignment --- segment the logical address space.

  4. Page de-allocation.

Virtual Memory

  1. Virtual memory --- what is it?

  2. What are the advantages?
    1. A program's logical address space can be larger than physical memory.

    2. Degree of multiprogramming can be increased (40 pages of memory; allocate only 5 pages to processes with spaces of 10 pages).

    3. Less I/O needed to load/swap a process.

  3. Demand paging.

  4. Why does it work?
    1. A lot of code is rarely run (error-handling routines).

    2. Oversizing of data structures.

    3. Locality of reference:
      1. Spatial.

      2. Temporal.

What we'll consider:

  1. System support.

  2. Page fault sequence.

  3. Replacement policies.

  4. Placement (allocation) policies.

System Support for Virtual Memory

  1. Kernel support.

  2. MMU support.

  3. CPU support.

Kernel Support

  1. Page fault handler.

  2. Page placement policies.

  3. Page replacement policies.



Thomas P. Kelliher
Fri Apr 14 10:10:22 EDT 2000
Tom Kelliher