CPU16 Datapath and Control

Tom Kelliher, CS 240

May 3, 2006

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Assignment

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CPU16 architecture.

Outline

  1. CPU16 datapath.

  2. CPU16 control.

Coming Up

CPU16 implementation.

CPU16 Datapath

(To be modified according to our architecture.)

High-level block diagram:

\begin{figure}\centering\includegraphics[width=6in]{Figures/f0530.eps}\end{figure}

The Complete Datapath

\begin{figure}\centering\includegraphics[width=6in]{Figures/f0533.eps}\end{figure}

Control signals:

  1. RegDst, RegWrite.

  2. ALUSrcA: Choose between PC and Rs.

  3. MemRead, MemWrite, MemtoReg.

  4. IorD: Choose between PC and ALUOut for memory address.

  5. PCWrite: Load a new value into PC.

  6. PcWriteCond: Load a new value into PC if zero is active.

  7. ALUOp.

  8. ALUSrcB: Choose between Rt/Rd, 4, sign-extended immediate, sign-extended shifted immediate.

  9. PCSource: Choose between PC + 4, ALUOut (branch target address), jump address

CPU16 Control

The Instruction Cycle

  1. Steps: Fetch, decode, execution/completion.

  2. Instructions: R-format, memory reference, conditional branch, jump.

Fetch

Common to all instructions.

  1. Load IR.

  2. Increment PC.

Decode

Common to all instructions.

  1. Load A (rs field) and B (rt field) from register file.

  2. Load ALUOut with branch target.

These are ``optimistic'' optimizations which do no harm, even if they are not needed/do not make sense for the current instruction.

Execution, Memory Address Computation, Branch Completion

Instruction classes go their own way.

  1. R-format:
    1. Perform ALU operation, loading ALUOut.

  2. Memory reference:
    1. Use ALU to compute sum of base & offset, loading ALUOut.

  3. Conditional branch:
    1. If zero load PC with computed branch target in ALUOut.

    This instruction has completed.

  4. Jump:
    1. Load PC with jump address.

    This instruction has completed.

R-Format Completion, Memory Access

Just two instruction classes remaining.

  1. R-format:
    1. Load register file (rd field) from ALUOut.

    This instruction has completed.

  2. Memory reference:
    1. sw: Memory location specified by address in ALUout written with value stored in B.

      This instruction has completed.

    2. lw: MDR loaded from memory location specified by address in ALUOut.

LW completion

  1. Load register file (rt field) from MDR.

Designing the Control Unit

Design the state machine necessary for controlling the datapath.


Thomas P. Kelliher 2006-04-28
Tom Kelliher