I/O Devices and Interrupts

Tom Kelliher, CS26

Oct. 29, 1996

1. Questions on the homework?

2. Midterm in 1 week.

3. Will review on Thursday and wrap-up 4.1--4.3.

I/O Device Interfacing

I/O devices:

1. Keyboard.

2. Mouse.

3. Printer (serial, parallel)

4. Terminal

5. Expansion cards:
   1. Video adapter.

   2. Ethernet card.

   3. SCSI controller.

   4. Terminal concentrator.

   5. CD controller.

Generic devices:

1. Serial port.

2. PS/2 port.

3. Parallel port.

4. USB, FireWire ports (new).

Split-bus design:

Contrast single-bus design.

This is the external bus, not the internal CPU bus.

The bus is broken down into:

1. Data bus.

2. Address bus.

3. Control bus:
   1. Read/Write.

   2. Acknowledge.

   3. Interrupt lines.

   4. Clear/Reset.

   5. Error.

   6. Memory/I/O.

   7. ...

Compared to memory, how does the CPU communicate with I/O devices?

1. Ports --- The addresses an I/O device responds to.

2. Interrupt --- How a device gets the CPU's attention.

3. DMA channel --- Allows an I/O device to access memory directly.

4. Memory-mapped I/O ports
   1. I/O ports in same address space as memory --- addressed same as memory.

   

5. Separate I/O address space
   1. Accessed through peek and poke.

   2. Control bus signal indicates which bus, memory or I/O is in use.

   3. Both buses can't be active simultaneously(?).

   

6. A device's bus interface:

   

7. I/O ports don't behave like memory words:
   1. They're ``active.''

   2. Status bits often reset when status register read.

Consider writing a buffer to a modem:

write:      lb $t0, 0($t1)
poll:       lw $t2, modemstatus($0)
            andi $t2, $t2, 1
            bnez $t2, poll
            sb $t0, modemdata($0)
            addi $t1, $t1, 1
            addi $t3, $t3, -1
            bnez $t3, write

1. $t0 holds the next character to write to the modem.

2. $t1 is the address of the next character to be written.

3. $t2 holds the modem's status word. Assume that bit one of the status word is the modem buffer busy bit.

4. $t3 is the count of how many characters to write to the modem.

5. modemstatus and modemdata are two ports associated with the modem.

1. Is the modem memory-mapped?

2. CPU wastes cycles polling.

3. One modem transfer requires CPU to read memory and write modem. (Non-DMA.)

Interrupts

1. Interrupts are a mechanism allowing a CPU to ``disconnect'' from active I/O devices to continue doing useful work.

2. CPU much faster than most I/O devices.

3. Polling wastes CPU cycles if there's other work to be done --- multiprogrammed system.

Conceptually, how do interrupts work?

``Unplanned'' function calls setup by planned function calls (syscalls, etc.).

Why does the kernel initiate the I/O operation?

Components of an interrupt system:

1. Interrupt request line(s). Priorities, arbitration within level, masking.

2. Interrupt acknowledge line(s).

3. Interrupt handlers (service routines).

4. A mechanism for indicating what device interrupted and why.

Interrupt Priorities, Masking

1. With multiple interrupt request lines, can prioritize interrupts.

2. Why do this?

3. Interrupt masking --- interrupt disabling. Used for:
   1. Critical sections (CS 42).

   2. Ensuring that high-priority interrupting devices are serviced before low-priority devices.

   3. Non-maskable interrupt.

Interrupting Device Identification

If we assign one IRQ line per device, identification isn't a problem:

What if some lines are shared?

One possibility: polling.

Another: vectored interrupts.

1. When interrupting device received ACK, it places interrupt vector on bus.

2. CPU uses vector as index into table of interrupt handlers.

3. Starvation?

Other Interrupt-Like Events

1. Traps:
   1. Divide-by-zero.

   2. Privileged instruction.

   3. Memory protection.

   4. Interval timer.

2. Software interrupts:
   1. Used to make transition from user mode to kernel mode.