Register Files, PC Architecture

Tom Kelliher, CS26

Oct. 17, 1996

Multiplexers and Decoders

1. Multiplexer --- -to-1 switch:

   

   Implementation of a 4-to-1 mux.

   ``Tiling'' multiple multiplexers to switch words.

2. Decoder --- 1-of- driver:

   

   Implementation of a 3-to-8 decoder.

Registers

1. Tiling D flip-flops.

2. Selective loading.

Tying It All Together --- A Register File

The MIPS statement

            add $t0, $t1, $t2

Need a three-port register file.

General block diagram of register file:

Detailed block diagram:

PC Architecture

How are the following connected?

1. CPU.

2. L1, L2, caches.

3. Main memory.

4. Video (1152x900x8 @ 72Hz.)

5. Disks: IDE, SCSI, CD-ROM.

6. Buses: ISA, EISA, MCA, VLB, PCI.

7. Ethernet.

8. Tape drive.

9. Serial, parallel ports, modems.

So, what does the inside of a PC look like?