Combinational Logic Circuits
Tom Kelliher, CS26
Oct. 8, 1996
Why bother? Speed, power, real estate.
- Karnaugh Maps.
- Minimal cover.
- The map is a sphere.
- Don't cares in real circuits.
- Gray code row, column numbering.
- Converting the covers to equations.
- Axis labels.
Try the following:
- The sum output of a full binary adder.
- The carry out output of a full binary adder.
- A circuit which compares two-bit unsigned numbers. There are three
outputs: inputs equal, first greater, second greater.
Why do TTL and CMOS designers use these gates?
Why are ECL designers so lucky?
- Design and implement a 2-1 multiplexer, using a K-map for
minimization of the output equation. Here's the truth table:
A multiplexer works like a switch. One way of drawing them is:
- Design and implement a circuit to take a BCD-encoded digit and drive
a seven-segment display (used in watches and calculators). Use a K-map to
minimize each of the seven output equations. Take advantage of don't
cares. Here is the labeling for the display:
- Design and implement a circuit to take a BCD-encoded digit and
increment it by one (nine should be ``incremented'' to zero). Use a K-map
to minimize each of the four output equations. Take advantage of don't
Thomas P. Kelliher
Mon Oct 7 09:49:09 EDT 1996